RK628H是一款高集成度的视频接口芯片，可支持HDMI/并行RGB/BT.1120作为输入，支持双MIPI/双LVDS/并行RGB/BT.1120输出，内置缩放器。关键应用场景是扩展RK3288/RK3399/RK3588等原始应用处理器的显示输出端口，或提供HDMI接口。
Video input interface
- HDMI RX interface
- Compliant with HDMI 4/HDMI 2.0
- Supports HDCP 4
- Supports 8/10bit per component video format
- Supports rgb888/yuv444/yuv422/yuv420
- Supports Max resolution 4096×2160@60fps
- Supports data rates up to 600Mhz, with PHY bit rate 6Gbps per lane
- Supports DDC Bus I2C master interface at 3/5V
- Supports EDID and CEC function
- Supports DVI
- Parallel IN interface
- Supports Max resolution 1080p@60fps
- Supports 16bits 1120 in
- Supports 24bits parallel RGB in
Table 1-1 RK628H video input interface
| Interface | Resolution | Data rate | Bit rate per lane |
| HDMI | 4096×2160@60 | NA | 6Gbps |
| BT.1120 | 1080p@60fps | 148.5M | NA |
| RGB | 1080p@60fps | 148.5M | NA |
Video output interface
- HDMI TX interface
- Supports all DTV resolutions including 480p/720p /1080p
- Supports data rate from 25MHz to 5MHZ
- TMDS Tx Drivers with programmable output swing, resister values and pre- emphasis
- DDC Bus I2C master interface at 3/5V
- The EDID and CEC function are also supported by HDMI Transmitter Controller
- MIPI TX interface
- DSI
- Compliant with MIPI DPHY 2
- Support the DPI interface color coding mappings into 24-bit Interface
- Up to 4 D-PHY Data Lanes per channel
- Supports data rate up to 3Gbps
- Supports dual channel DSI
- CSI
- Compliant with MIPI DPHY 2
- Support format: YUV422
- Up to 4 D-PHY Data Lanes
- Supports data rate up to 3Gbps
- Supports dual channel CSI
- LVDS TX interface
- Compliant with the Standard TIA/EIA-644-A LVDS standard
- Supports data rate up to 1Gbps
- Support 8bit format-1, format-2, format-3 display mode, Support 6bit display
- Supports dual channel LVDS
- DSI
- Parallel Video Out interface
- Supports Max resolution 1080p@60fps
- Supports 16bits 1120 out
- Supports 24bits parallel RGB out
Table 1-2 RK628H video output interface
| Interface | Resolution | Data rate | Bit rate per lane |
| Dual MIPI DSI | 2560×1600@60fps | NA | 1.3Gbps |
| MIPI DSI | 1080p@60fps | NA | 1.3Gbps |
| Dual MIPI CSI | 3840×2160@60fps | NA | 1.3Gbps |
| MIPI CSI | 3840×2160@30fps | NA | 1.3Gbps |
| Dual LVDS | 1080p@60fps | NA | 1 Gbps |
| LVDS | 720p@60fps | NA | 1 Gbps |
| BT.1120 | 1080p@60fps | 148.5M | NA |
| RGB | 1080p@60fps | 148.5M | NA |
| HDMI | 1080p@60fps | 148.5M | NA |
TX/RX adapter
- Interaction of HDP signal between HDMI TX and HDMI RX
- Support HDMI TX CEC function
- Support RX 4 inside-key memory. It is readable and writable
- Support HDMI RX/TX
- Support on-chip EDID It is readable and writable
Post process
- CSC
- RGB2YUV
- YUV2RGB
- YUV2VYU
- CSC matrix
- Display interface
- Parallel display Interface: 30-bit(RGB/YUV)
- Asynchronous output pixel clock (PLL required)
- Flexible display timing setting
- Configurable border black area
- Scaling down
- Max input resolution: 4096×2160
- Arbitrary non-integer scaling ratio
- Support two mode: bilinear and average
- Max 1/4 scaling ratio for bilinear scaling down
- Max 1/6 scaling ratio for average scaling down
- Scaling up
- Max output resolution: 4096×2160
- Arbitrary non-integer scaling ratio
- Support four scaling up mode for different effect
- Max 6 scaling ratio
- Split
- Left-right mode
- Odd-even mode
Others
- Audio
- Support HDMI RX I2S interface, up to 192kHz sample rate, 8 channel
- Support I/O I2S interface, 8 channel
- Support HDMI TX I2S interface, 8 channel
- Support the connection of RX and TX’s I2S
- PWM
- Single channel PWM output supported
- Package Type
FBGA144L (body:8mm x 8mm ;ball size: 0.3mm ;ball pitch: 0.65)
