Amlogic S905X2 is an advanced application processor designed for hybrid OTT/IP Set Top Box(STB) and high-end media box applications. It integrates a powerful CPU/GPU subsystem, a secured 4K video CODEC engine and a best-in-class HDR image processing pipeline with all major peripherals to form the ultimate low power multimedia AP.
The main system CPU is a quad-core ARM Cortex-A53 CPU with unified L2 cache to improve system performance. In addition, the Cortex-A53 CPU includes the NEON SIMD co-processor to improve software media processing capability.
The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The ARM G31 MP2 GPU handles all OpenGL ES 3.2 Vulkan 1.0 and OpenCL 2.0 graphic programs, while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. Together, the CPU and GPU handle all operating system, networking, user-interface and gaming related tasks. The video output pipeline includes Dolby Vision Optional, advanced Dynamic HDR10, HDR10, HLG and PRIME HDR processing, REC709/BT2020 processing, motion adaptive edge enhancing de-interlacing, flexible programmable scalar, and many picture enhancement filters before passing the enhanced image to the video output ports.
Amlogic Video Engine (AVE-10) offloads the Cortex-A53 CPUs from all video CODEC processing. It includes dedicated hardware video decoder and encoder. AVE-10 is capable of decoding 4Kx2K resolution video at 75fps with complete Trusted Video Path (TVP) for secure applications and supports full formats including MVC, MPEG-1/2/4, VC-1/WMV, AVS, AVS+, AVS2 RealVideo, MJPEG streams, H.264, H265-10, VP9 and also JPEG pictures with no size limitation. The independent encoder is able to encode in JPEG or H.265/H.264 up to 1080p at 60fps.
S905X2 integrates all standard audio/video input/output interfaces including a HDMI2.1 transmitter with 3D, Dynamic HDR, CEC and HDCP 2.2 support, stereo audio DAC, a CVBS output, a DVP camera interface and multiple TDM, PCM, I2S and SPDIF digital audio input/output interfaces, and 8 channel far-field PDM digital microphone (DMIC) inputs.
S905X2 also integrates a set of functional blocks for digital TV broadcasting streams. The built-in two demux can process the TV streams from the serial and parallel transport stream input interface, which can connect to external tuner/demodulator.
The processor has rich advanced network and peripheral interfaces, including a 10/100/1000M Ethernet MAC with RGMII, 10/100M Ethernet PHY, dual USB 2.0 high-speed ports (one OTG and one HOST), one USB3.0/PCIE 2.0 combo interface and multiple SDIO/SD card controllers, UART, I2C, high-speed SPI and PWMs.
CPU Sub-system
Quad core ARM Cortex-A53 CPU
ARMv8-A architecture with Neon and Crypto extensions
8-stage in-order full dual issue pipeline
Unified system L2 cache
Build-in Cortex-M4 core for always on processing
Build-in Cortex-M3 core for system control processing
Advanced TrustZone security system
Application based traffic optimization using internal QoS-based switching fabrics
3D Graphics Processing Unit
ARM G31 MP2 GPU
4-wide warps, dual texture pipe, 2x 4-wide execution engines (EE)
Concurrent multi-core processing
OpenGL ES 3.2, Vulkan 1.0 and OpenCL 2.0 support
Video/Picture CODEC
Amlogic Video Engine (AVE) with dedicated hardware decoders and encoders
Support multi-video decoder up to 4Kx2K@60fps+1x1080P@60fps
Supports multiple “secured” video decoding sessions and simultaneous decoding and encoding
Video/Picture Decoding
– VP9 Profile-2 up to 4Kx2K@60fps
– H.265 HEVC MP-10@L5.1 up to 4Kx2K@60fps
– AVS2-P2 Profile up to 4Kx2K@60fps
– H.264 AVC HP@L5.1 up to 4Kx2K@30fps
– H.264 MVC up to 1080P@60fps
– MPEG-4 ASP@L5 up to 1080P@60fps (ISO-14496)
– WMV/VC-1 SP/MP/AP up to 1080P@60fps
– AVS-P16(AVS+) /AVS-P2 JiZhun Profile up to 1080P@60fps
– MPEG-2 MP/HL up to 1080P@60fps (ISO-13818)
– MPEG-1 MP/HL up to 1080P@60fps (ISO-11172)
– RealVideo 8/9/10 up to 1080P@60fps
– Multiple language and multiple format sub-title video support
– MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
– Supports JPEG thumbnail, scaling, rotation and transition effects
– Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats
Video/Picture Encoding
– Independent JPEG and H.265/H.264 encoder with configurable performance/bit-rate
– JPEG image encoding
– H.265/H.264 video encoding up to 1080P@60fps with low latency
8th Generation Advanced Amlogic TruLife Image Engine
Supports Dolby Vision Optional, Dynamic HDR10, HDR10, HLG and Technicolor HDR processing
Motion compensated noise reduction and 3D digital noise reduction for random noise
Block noise, mosquito noise, spatial noise, contour noise reduction
Motion compensated and motion adaptive de-interlacer
Edge interpolation with low angle protection and processing
3:2/2:2 pulldown and Video on Film (VOF) detection and processing
Smart sharpness with SuperScaler technology including de-contouring, de-ring, LTI, CTI, de-jaggy, peaking
Dynamic non-Linear contrast enhancement
All dimension multiple regions smart color management including blue/green extension, flesh-tone correction, wider gamut for video
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2 video planes and 3 graphics planes hardware composer
Independent HDR re-mapping of video and graphic layer
Camera Interface
ITU 601/656 parallel video input with down-scaler
Supports camera input as YUV422, RGB565, 16bit RGB or JPEG
Video Output
Built-in HDMI 2.1 transmitter including both controller and PHY with CEC, Dynamic HDR and HDCP 2.2, 4Kx2K@75 max resolution output
CVBS 480i/576i standard definition output
Supports all standard SD/HD/FHD video output formats: 480i/p, 576i/p, 720p, 1080i/p and 4Kx2K
Audio Decoder and Input/Output
Supports MP3, AAC, WMA, RM, FLAC, Ogg Dolby DigitalOptional, Dolby Digital PlusOptional, DTSOptiona and programmable with 7.1/5.1 down-mixing
Built-in serial digital audio SPDIF/IEC958 input/output and PCM input/output
3 built-in TDM/PCM/I2S ports with TDM/PCM mode up to 384kHz x32bits x 8ch or 96kHz x 32bits x 32ch and I2S mode up to 384kHz x 32bits x 8ch
Digital microphone PDM input with programmable CIC, LPF & HPF, support up to 8 DMICs
Built-in stereo audio DAC
Supports concurrent dual audio stereo channel output with combination of analog+PCM or I2S+PCM
Memory and Storage Interface
32-bit DRAM memory interface with dual ranks and max 4GB total address space
Compatible with JEDEC standard DDR3-2133 /DDR3L-2133 /DDR4-2666 /LPDDR3-2133 /LPDDR4-3200 SDRAM
Supports SLC/MLC/TLC NAND Flash with 60-bit ECC, compatible to Toshiba toggle mode in addition to ONFI 2.2
SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting spec version 2.x/3.x/4.x DS/HS modes up to UHS-I SDR104
eMMC and MMC card interface with 1/4/8-bit data bus width fully supporting spec version 5.0 HS400
Supports serial 1, 2 or 4-bit NOR Flash via SPI interface
Built-in 4k bits One-Time-Programming memory for key storage
Network
Integrated Gigabit Ethernet Integrated IEEE 802.3 10/100/1000M Gigabit Ethernet MAC controller with RGMII interface
Integrate 10/100M Ethernet PHY interface
WiFi/IEEE802.11 & Bluetooth supporting via PCIE/SDIO /USB/UART/PCM
Network interface optimized for mixed WIFI and BT traffic
Digital Television Interface
One serial and one parallel Transport stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator
Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
Integrated ISO 7816 smart card controller
Integrated I/O Controllers and Interfaces
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Dual USB 2.0 high-speed USB I/O, one USB Host and one USB OTG
One USB SS and PCIE 2.0 combo interface up to 5Gbps, supports 2 configurations:
– 1 USB2.0 OTG + 1 USB 2.0 Host + 1 PCIe
– 1 USB2.0 OTG + 1 USB3.0 (No PCIe)
Multiple PWM, UART, I2C and SPI interface with slave select
Programmable IR remote input/output controllers
Built-in 10bit SAR ADC with 3 input channels
A set of General Purpose IOs with built-in pull up and pull down
System, Peripherals and Misc. Interfaces
Integrated general purpose timers, counters, DMA controllers
24 MHz crystal input
Embedded debug interface using ICE/JTAG
Power Management
Multiple internal power domains controlled by software
Multiple sleep modes for CPU, system, DRAM, etc.
Multiple internal PLLs for DVFS operation
Multi-voltage I/O design for 1.8V and 3.3V
Power management auxiliary processor in a dedicated always-on (AO) power domain for system stand-by
Security
Trustzone based Trusted Execution Environment (TEE)
Secured boot, encrypted OTP, encrypted DRAM with memory integrity checker, hardware key ladder and internal control buses and storage
Separated secure/non-secure Entropy true RNG
Pre-region/ID memory security control and electric fence
Hardware based Trusted Video Path (TVP), video watermarking and secured contents (needs SecureOS software)
Secured IO and secured clock
Package
FCBGA, 14mm*14mm
